Hardware Verification Group (HVG)
Dep. of Electrical and Computer Engineering
Office: SGW Campus, EV. 16,169
Office ☎: +1 514-848-2424 (ext: 7261)
Research InterestsIn general: Formal and Semi-formal Verification, Statistical Runtime Verification, Analog and Mixed Signal Designs Verification
Application domain: Noise and process variation impact on analog and mixed signal circuits.
I am a PhD student under the supervison of Prof. Sofiene Tahar in the Hardware Verification Group at Concordia University. Previously, at Ecole Nationale d'Ingénieurs de Tunis (ENIT), I received my M.A.Sc. and my B.Sc. degrees in Telecommunication Engineering with research in the area of statistical runtime verification of analog circuits.
Recent News and Activities
- Selected as graduate students representative for the ECE department 😊
- Awarded with the First Place Award at the ECE-GSR conference
- Paper accepted in the International Symposium on Circuits and Systems (ISCAS'16)
- Me in the achievement section of Resmiq Newsletter
- Awarded with the TCVLSI Best Paper Award at the IEEE Annual Symposium on VLSI (ISVLSI'15)