Voltage controlled oscillators (VCOs) are the central circuit block in phase-locked loops (PLLs). Although LC VCOs have superior phase noise performance, for a given power dissipation compared with ring VCOs, due to the use of inductors, LC VCOs are much larger in area and more disruptive to the power and ground distribution network when used in system-on-chip (SoC) applications. In this project, ring VCOs based on full swing static-CMOS circuits are explored with the aim of designing low-noise ring VCOs capable of GHz range operation for wireline applications.

In addition to noise performance, emphasis is placed on wide-tuning range in spite of process and temperature variation, differential tuning with rejection of common-mode interference and power supply and substrate noise rejection.