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Patent:

[P1] G. Cowan, D. Friedman, M. Meghelli, “Architecture for maintaining constant voltage controlled oscillator gain,” 7741919. Issued June 22nd, 2010.

Journal Papers:

[J7] S. Moazzeni, M. Sawan, and G. Cowan, “Optimizing the Power-Sensitivity Trade-off in TRF Receivers,” Analog Integrated Circuits and Signal Processing (Springer) special issue from 2012 NEWCAS (Solicited following the conference. Accepted)

[J6] S. Esmaeili, A. Al-Khalili, and G. Cowan, “Low-Swing Differential Conditional Capturing Flip-Flop for LC Resonant Clock Distribution Networks,” IEEE Trans. on VLSI Systems, vol. 20, no. 8, Aug. 2012, pp. 1547-1551.

[J5] Y. Shen, B. Hraimel, X. Zhang, G. Cowan, K. Wu, and T. Liu, “A Novel Analog Broadband RF Predistortion Circuit to Linearize Electroabsorption Modulator in Multiband OFDM Ultra-Wideband Radio over Fiber System,” IEEE Trans. on Microwave Theory and Techniques, vol. 58, no. 11, part 2, Nov. 2010, pp. 3327-3335.

[J4] S. Esmaeili, G. Cowan, and A. Al-Khalili, “Dual-Edge Triggered Sense Amplifier Flip-Flop for Resonant Clock Distribution Networks” IET Computers and Digital Techniques, vol. 4, no. 6, Nov. 2010, pp. 499-514.

[J3] S. Esmaeili*, A. Farhangi^, A. Al-Khalili, and G. Cowan, “Skew compensation in energy recovery clock distribution networks,” IET Computers and Digital Techniques, vol. 4, no. 1, pp. 56-72, Jan 2010. 

[J2] A. Moradi*, R. Raut, and G. Cowan, “Temperature compensation in gm-C filters using resistive bridge,” IET Electronics Letters, vol. 45, no. 18, pp. 921-923, Aug 27th, 2009. 

[J1] G. Cowan, R. Melville, and Y. Tsividis, “A VLSI analog computer / digital computer accelerator,” Journal of Solid-State Circuits, vol. 41, no. 1, pp 42-53, Jan. 2006. 

Conference Presentations:

[C27] A. Rabbani Abolfazli, Y. R. Shayan, G. E. R. Cowan, “750Mb/s 17pJ/b 90nm CMOS (120, 75) TS-LDPC Min-Sum based analog decoder,” IEEE Asian Solid-State Circuits Conference (Accepted).

[C26] M. Behbahani and G. Cowan, “Phase-Noise Tuneable Ring Voltage-Controlled Oscillator in 90 nm CMOS,” IEEE Mid-West Symposium on Circuits and Systems, Columbus, OH, Aug. 2013.

[C25] C. Williams, O. Liboiron-Ladouceur, and G. Cowan, “Power and Noise Configurable Phase-Locked Loop Using Multi-Oscillator Feedback Alignment,” IEEE Mid-West Symposium on Circuits and Systems, Columbus, OH, Aug. 2013.

[C24] P. Dash, O. Liboiron-Ladouceur, and G. Cowan, “A Variable Bandwidth, Power Scalable Optical Receiver Front-End in 65nm,” IEEE Mid-West Symposium on Circuits and Systems, Columbus, OH, Aug. 2013.

[C23] P. Dash, O. Liboiron-Ladouceur, and G. Cowan, “Inductorless, Power-Proportional, Optical Receiver Front-End in TSMC 90 nm,” IEEE International Symposium on Circuits and Systems, Beijing, China, May 2013, pp. 1127-1130.

[C22] G. Cowan, C. Williams, “Phase-Locked Loop Architecture for Enhanced Voltage-Controlled Oscillator Phase-Noise Suppression,” IEEE International Symposium on Circuits and Systems, Beijing, China, May 2013, pp. 2476-2479.

[C21] S. Moazzeni, G. Cowan, and M. Sawan, “A Mismatch-Robust Period-Based VCO Frequency Comparison Technique for ULP Receivers,” IEEE International Symposium on Circuits and Systems, Beijing, China, May 2013, pp. 1765-1768.

[C20] G. Cowan, M. Meghelli, D. Friedman, “A Linearized Voltage-Controlled Oscillator for Dual-Path Phase-Locked Loops,” IEEE International Symposium on Circuits and Systems, Beijing, China, May 2013, pp. 2678-2681.

[C19] S. Esmaeili, R. Islam, A. Al-Khalili, and G. Cowan, “Dual-edge triggered sense amplifier flip-flop utilizing an improved scheme to reduce area, power, and complexity,” 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec. 2012, pp. 292-295.

[C18] S. Moazzeni, G. Cowan, M. Sawan, “A comprehensive study on the power-sensitivity trade-off in TRF receivers,” IEEE NEWCAS, Montreal, Canada, June 2012, pp. 401-404.

[C17] A. Rabbani Abolfazli, Y. R. Shayan, G. E. R. Cowan, “TS-LDPC Analog Decoding Based on the Min-Sum Algorithm,” 26th Biennial Symposium on Communications (QBSC), Kingston, Canada, May 2012, pp. 162-167.

[C16] S. Esmaeili, A. Farhangi, A. Al-Khalili, and G. Cowan “Clock Tree Structure With Reduced Wire Length Using the Matched-Delay Skew Compensation Technique,” Canadian Conference on Electrical and Computer Engineering, Montreal, Canada, May 2012.

[C15] S. Moazzeni, G. Cowan, M. Sawan, “A 28μW Sub-Sampling Based Wake-Up Receiver with -70dBm Sensitivity for 915MHz ISM Band Applications,” International Symposium on Circuits and Systems, Soeul, Korea, May 2012, pp. 2797-2800.

[C14] M. Naik, S. Magierowski, G. Cowan, and T. Zourntos, “Mixed-Mode IC Design of a Cyberphysical Path-Planner for Miniature Robots,” 3rd International Conference on Computational Intelligence and Software Engineering (CiSE 2011), Wuhan, China, Dec. 2011.

[C13] O. Ghasemi, R. Raut, G. Cowan, “Complex Conjugate Pole Analysis for Bandwidth Extension of Transimpedance Amplifiers,” IEEE Midwest Symposium on Circuits and Systems, Seoul, Korea, Aug. 2011.

[C12] M. Javanmardi-Nasab and G. Cowan, “Oscillator-based calibration architecture to reduce the impact of process variation on CML,” 2nd European Workshop on CMOS Variability, VARI 2011, Grenoble, France, May 2011.

[C11] S. Esmaeili, A. Al-Khalili, and G. Cowan, “Estimating the Required Driver Strength in the Resonant Clock Generator,” IEEE APCCAS, Malaysia, Dec. 2010, pp. 927-930.

[C10] S. Esmaeili*, A. Al-Khalili, and G. Cowan, “Dual-Edged Triggered Pulsed Energy Recovery Flip-Flops,” IEEE NEWCAS 2010, Montreal, Canada, June 2010.

[C9] S. Esmaeili*, A. Al-Khalili, and G. Cowan, “Dual-Edge Triggered Energy Recovery DCCER Flip-Flop for Low Energy Applications,” 19th European Conference on Circuit Theory & Design, Turkey, Aug. 2009, pp 57-60.

[C8] A. Aryanpour* and G. Cowan, “A Circuit Design and Fabrication Approach to Address Global Process Variation”, IEEE Mid-West Symposium on Circuits and Systems, Mexico, Aug. 2009, pp. 455-458.

[C7] S. Moazzeni* and G. Cowan, “Application of Active Current Mirrors to Improve the Speed of Analog Decoder Circuits,” IEEE Mid-West Symposium on Circuits and Systems, Mexico, Aug. 2009, pp. 94-97.

[C6] O. Ghasemi*, R. Raut, and G. Cowan, “A Low Power Transimpedance Amplifier Using Inductive Feedback approach in 90nm CMOS,” IEEE International Symposium on Circuits and Systems, Taiwan, May 2009, pp. 1937-1940.  [Flagship conference of the IEEE Circuits and Systems Society]

[C5]  S. Esmaeili*, A. Al-Khalili, and G. Cowan, “A Study on the Effects of Temperature and Loading on the Power Consumption in Energy Recovery Resonant Clocking”, Information Science and Technology, Kuwait, Mar. 2009, pp. 365-368.

[C4] S. Esmaeili*, G. Cowan, and A. Al-Khalili, “A Novel Approach for Skew Compensation in Energy Recovery Clock Distribution Networks,” The 20th International Conference on Microelectronics, Sharjah, UAE, Dec. 2008, pp. 365-368.

[C3] S. Esmaeili*, G. Cowan, and A. Al-Khalili, “Power Reduction in Energy Recovery and Square-Wave Clock Distribution Networks Operating at Half Frequency with Dual-Edge Triggered Flip-Flops,” IEEE NEWCAS-TAISA 2008, June 2008, pp. 125 – 128.

[C2] Y. Tsividis, G. Cowan, Y. W. Li, and K. Shepard, “Continuous-Time DSPs, Analog/Digital Computers and Other Mixed-Domain Circuits,” Proceedings of the 31st European Solid-State Circuits Conference (ESSCIRC), 2005, pp 113-116. 

[C1]  G. Cowan, R. Melville, and Y. Tsividis, “A VLSI analog computer/co-processor for a digital computer,” Proceedings of the International Solid-State Circuits Conference (ISSCC), February 2005, pp 82-83, 586. 

Workshop presentations:

[W3] M. Behbahani and G. Cowan, “Variability Mitigation Strategies in CML circuits: Design of a Noise-Configurable Voltage Controlled Oscillator,” CMOS Emerging Technologies Workshop, Whistler, Canada, May 2010.

[W2] G. Cowan, Y. Tsividis, “Analog and Digital Continuous-Time Computation and Signal Processing,” CMOS Emerging Technologies Workshop, Banff, Canada, Feb 18th-20th, 2009.

[W1] G. Cowan and Y. Tsividis, “Analog and Digital Continuous-Time Computation and Signal Processing,” Analog Decoding Workshop, Montreal, Canada, May 2007, pp. 12.

Doctoral dissertation:

G. Cowan, “A VLSI Analog Computer/Math Co-processor for a Digital Computer”, Columbia University,           New York, NY, 2005. (Eliahu I. Jury Award)