| Group |
2023-03 |
Status |
completed |
| Title |
Miniaturization of Circuits for Digital Signaling Standards for Harsh Environments |
| Supervisor |
G. Cowan |
| Description |
An industrial partner based in Montreal designs computers that operate in harsh environments. These systems communicate with various peripherals such as switches other user controls. With higher supply voltages, standard integrated circuits are unsuitable and designs using discrete commercial-off-the-shelf components have been successfully deployed. With an eye toward miniaturization, the capstone group will design an integrated circuit that successfully implements the required functionality.
Students will not only design electronics, but simulate schematics, and layout an IC chip. With stringent reliability constraints, students will consider the impact of over-voltage scenarios both in static and transient conditions.
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| Student Requirement |
The group should have students who did well in ELEC 312 and who are taking COEN 451 and ELEC 433. Other relevant courses would be ELEC 351, 367, 372; COEN 315. Students will make heavy use of the Cadence suite of computer-aided IC design tools. Any previous experience is an asset. |
| Tools |
Cadence ICFB tools |
| Number of Students |
7 |
| Students |
J. Fodi, A. Ruli, M. Bergeron, S. Granata, A. Iacampo, M. Tenveer, N.S. Tran |
| Comments: |
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