| Group |
2022-22 |
Status |
completed |
| Title |
CPU Education Platform |
| Supervisor |
S. Le Beux and T. Obuchowicz |
| Description |
This project aims to design and create a RISC-V compliant CPU using an FPGA integrated into a PCB. This tool would expose the inner workings of a central processing unit using several 7 segment displays and could be used as a teaching tool for CEGEP & early university students. The CPU would interface with an online platform (either a mobile application or website) via an Arduino which would allow simple bilateral communication between the user and the CPU. The CPU could also be accessed directly, for uploading more advanced programs. |
| Requirement |
COEN 311, ELEC 273, COEN/ELEC 390, SOEN 341, COEN 313, COEN 316
|
| Tools |
Soldering iron, heat gun, PCB assembly, ICs, oscilloscope
|
| Number of Students |
5-6 |
| Students |
M. Williams, M. Deronian, N. Ouellette, N. Bernier-Nguyen, D. De Longchamp |
| Comments: |
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