Lecture Slides

• Introduction to COEN6551 [28 pages PDF]

• Introduction to Design Verification [50 pages PDF]

• Introduction to Formal Verification. [43 pages PDF]

• Verification by Equivalence Checking. [78 pages PDF]

• Temporal Logics and Model Checking. [47 pages PDF]

• Verification by Theorem Proving . [51 pages PDF]

• Case Study: Formal Verification of an ATM Switch Fabric using VIS . [29 pages PDF]

• Case Study: Formal Verification of RISC Processors using HOL . [29 pages PDF]

Formality and Conformal Equivalence Checking Tools

• Digital Logic Synthesis and Equivalence Checking Tools Tutorial [30 pages, PDF]

• Introductory Slides to Synopsys Design Compiler. [10 pages, PDF]

• Introductory Slides to Formality. [10 pages, PDF]

• Introductory Slides to Conformal Logical Equivalence Checker. [10 pages, PDF]